(a) Field of the Invention
The present invention relates to a method for manufacturing a semiconductor memory device having a ferroelectric capacitor and, more particularly, to an improvement of electric characteristics in a nonvolatile semiconductor memory device having a ferroelectric capacitor, such as polarization, dielectric breakdown and leakage current characteristics.
(b) Description of the Related Art
A ferroelectric capacitor having a ferroelectric film between pair of electrodes and a nonvolatile semiconductor memory device having such a ferroelectric capacitor have been proposed. Such a semiconductor memory device can be fabricated by a known fabrication process for a silicon semiconductor integrated circuit, into which the ferroelectric capacitors are further integrated. For example, a stacked ferroelectric capacitor can be formed as overlying a silicon switching transistor in a memory cell with an intervention of an interlayer dielectric film.
A conventional nonvolatile semiconductor memory device is described in, for example, Patent Publication Nos. JP-A-1995-50391 and JP-A-1995-263637. A first conventional nonvolatile semiconductor, memory device described in the former will be described with reference to FIG. 1. The semiconductor memory device has a silicon substrate 11, an oxide film 12 formed thereon for separation between memory cells, and a switching transistor in each memory cell including source 13a, drain 13b and gate electrode 15.
The memory device further includes an interlayer dielectric film 16 on the switching transistor, and a ferroelectric capacitor formed on the interlayer dielectric film 16 and having a top electrode 19 and a bottom electrode 17 sandwiching therebetween a ferroelectric film 18. A first protective layer 26 overlying the ferroelectric capacitor is formed on the entire surface and metallic interconnects 24a, 24b, 25a and 25b are formed thereon and within through-holes 22a, 22b, 23a and 23b formed in the protective film 26 and the underlying films. A second protective layer is then formed thereon including first silicon oxide film 27a doped with phosphorous and a second, undoped silicon oxide film 27b.
A second conventional nonvolatile semiconductor memory device described in JP-A-1995-263637 will be described with reference to FIG. 2 based on the fabrication method therefor. The steps up to fabrication of the ferroelectric capacitor are similar to those in the first conventional memory device of FIG. 1. In the second conventional memory device, the first protective layer 26 is implemented by a phospho-silicate glass (PSG) which is thermally treated or annealed in a nitrogen atmosphere to limit the water content within the first protective film 26 below 0.5 gram/cm.sup.3.
It is recited in the publication that such a thermal treatment achieves suppression of leakage current and improvement of dielectric breakdown characteristics in the ferroelectric capacitor by limiting the water content. After the thermal treatment, through-holes 22a, 22b, 23a and 23b are formed for diffused regions 13a and 13b of the switching transistor and top and bottom electrodes 19 and 17 of the ferroelectric capacitor. Subsequently, metallic interconnects 24a, 24b, 25a and 25b for the diffused regions 13a and 13b and the ferroelectric capacitor are deposited, followed by plasma enhanced CVD (chemical vapor deposition) of silicon nitride or silicon nitride oxide film as a second protective layer 27.
In the conventional memory device, the deposition step and the presence itself of the first protective layer 26 covering the ferroelectric capacitor degrade electric characteristics of the ferroelectric capacitor, especially polarization and leakage current characteristics.
Specifically, if the protective layer 26 for the ferroelectric capacitor is made of silicon oxide, the deposition step for the protective layer 26 is generally effected by a CVD technique using a gas as a source material, sputtering technique using a solid source material and a coating and baking technique using a liquid source material. The source gas in the CVD technique generally contains hydrogen atoms or hydrides bonded to silicon atoms, as is the case of monosilane (SiH.sub.4). The CVD step is conducted in a vacuum reactor or in an atmospheric condition by effecting decomposition of the source gas by plasma or thermal energy. Accordingly, some of the CVD processes generate a large amount of hydrogen during the deposition, which generally deoxidizes and degrades the ferroelectric film implemented as a metal composite oxide film. In this respect, even the protective layer made of silicon oxide film containing as low as below 0.5 gram/cm.sup.3 water and described in JP-A-1995-263763 as mentioned above suffers from the problem water so long as the protective layer is formed by a CVD technique generating hydrogen.
The protective layer for the ferroelectric capacitor degrades the polarization characteristic of the ferroelectric film if the protective layer contains significant amount of water. FIGS. 3A and 3B each shows applied voltage dependency of polarization in the ferroelectric film containing water at 5% within the ferroelectric film before deposition step of the protective layer and after deposition of the protective layer at 300.degree. C. As shown by these drawings, the deposition step for the protective layer degrades the polarization characteristic of the ferroelectric film in the ferroelectric capacitor.
In addition, the water in the protective layer covering the ferroelectric capacitor, even if limited to a reasonable content, itself causes a significant amount of leakage current in the ferroelectric capacitor and also affects polarization characteristic thereof. The water content less than 0.5 gram/cm.sup.3 is not practical in fact because this water content makes a gel in the protective layer.